The present invention relates to a semiconductor device, an image display device, and method and apparatus for manufacturing the image display device and relates to a technique effective for use in a device having a switching device in which a leak current in an off state is reduced.
FIG. 15 shows an example of a pixel configuration in a TFT (Thin-Film-Transistor) liquid crystal panel according to a conventional technique. Each pixel is constructed by a pixel switch 101, a liquid-crystal capacitor 102, and a load capacitor 103. One end of the pixel switch 101 is connected in parallel with the liquid-crystal capacitor 102 and the load capacitor 103. The other end of the pixel switch 101 is connected to a signal-line driving circuit 107 via a signal line 106. The gate of the pixel switch 101 is connected to a gate-line driving circuit 108 via a gate line 104. The other end of the load capacitor 103 is connected to a load capacitor line 105. Although not shown, pixels are arranged in a matrix on a panel, the signal line 106 is connected commonly to pixels in the column direction, and the gate line 104 and the load capacitor line 105 are connected commonly to pixels in the row direction.
In FIG. 15, at the beginning of a horizontal scanning period, a pixel row to which a display signal is to be written is selected in a predetermined order by the gate-line driving circuit 108, and the pixel switch 101 of this row is set in the on state. Subsequently, the signal-line driving circuit supplies the write signal to each of the pixels in the selected row to the liquid-crystal capacitor 102 and the load capacitor 103 via the signal line 106 and the pixel switch 101. At the end of the horizontal scanning period, the gate-line driving circuit 108 sets the pixel switch 101 of the row into the off state, thereby finishing the writing operation on the pixels of one row.
FIG. 16 is a sectional structural diagram of a polycrystal TFT as a component of the pixel switch 101. The channel portion is constructed by a poly-Si thin film. On the poly-Si thin film, a gate electrode 112 is provided via a gate insulating film 115. A source 110 and a drain 111 are formed by doping an n-type high-concentration impurity into the poly-Si thin film. Further, n-regions 113 and 114 for electric field reduction are provided so as to be self-aligned with the gate insulating film 115.
FIG. 17 shows the current-voltage characteristics of the polycrystal TFT as a component of the pixel switch 101. When a gate voltage Vgs becomes negative and the pixel switch 101 is turned off, it is ideal that a current Ids becomes 0. However, in reality, as the gate voltage Vgs increases on the negative side, the off characteristic of the polycrystal TFT indicates an increase tendency as shown by the arrow in FIG. 17. This is caused by thermal carrier emission from defect-induced states in the poly-Si film and occurrence of a leak current by tunneling. The details of such a leak current are described in, for example, xe2x80x9cJournal of Applied Physicsxe2x80x9d, 50(8), pp. 5484-5487 (1979).
In the case where the leak current cannot be ignored, a signal charge written in the liquid-crystal capacitor 102 flows out from the pixel switch 101, so that deterioration occurs in a displayed image due to flicker noise or the like. The purpose of providing the n-regions 113 and 114 for electric field reduction in the pixel switch 101 is to reduce the leak current. Further, the purpose of providing the load capacitor 103 for a pixel is to suppress the influence of the leak current by increasing the amount of charges written into the pixel.
Such a conventional technique is described in, for example, xe2x80x9cProceedings of International Display Workshop ""96 (IDW""96)xe2x80x9d, pp. 5-8 (1996).
In order to reduce the influence of the leak current of the pixel switch 101 to a level at which the influence can be ignored, employment of only the n-regions 113 and 114 is insufficient, and the load capacitor 103 has to be formed. However, when the pixel size decreases as the liquid crystal panel is becoming more precise, by providing the load capacitor 103, the fill-factor of pixels deteriorates, and a problem such that the brightness of the screen is reduced occurs.
It is therefore an object of the invention to provide a semiconductor device having a high-performance novel switching device in which a leak current in an off state is reduced. Another object is to provide an image display device realizing higher definition by using the switch device. Further another object is to provide method and apparatus for manufacturing a semiconductor device including the switch device and a semiconductor device suitable for forming the image display device. The above and other objects and novel features of the invention will become apparent from the description of the specification and the appended drawings.
Outline of a representative embodiment of the invention disclosed in the specification will be briefly described as follows. A switch device includes conductive source, drain, and gate electrode, one or more semiconductor island layer(s) formed between the source and drain, an insulating film between the source and island layer, an insulating film between the drain and island layer, an insulating layer between island layers if a plurality of island layers are provided, and a gate capacitor formed by the gate electrode, at least one island layer, and a gate insulating film provided between the gate electrode and the island layer. The electric field applied to the gate capacitor is set to be substantially parallel with a channel current flowing via the island between the source and the drain.